CPU/NPU Architecture RTL Design Engineer (Sr level and up)

ideally 5+ years of experience strong knowledge in CPU/AI processor micro-architecture, architecture RTL design debug architecture power-management and circuit design. RTL Design of high-performance CPU/AI processors RTL coding, micro-architecture and architecture Computer Arithmetic Instruction fetch, scheduling and register renaming Fixed-Point, Floating-Point design Matrix Multiply engines Vector Extensions Memory sub-systems, Load/store, caches, atomics, coherence and consistency Branch prediction, out-of-order, dispatch, schedulers Multi-processor and multi-threaded systems RISC-V Power, performance and Area (PPA) optimizations CPU sub-system Logic Design Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.