Research Associate, Semiconductors & AI Infrastructure - 26229

Research Associate, Semiconductors & AI Infrastructure

Why YOU want this position

At Enverus, we’re committed to empowering the global quality of life by helping our customers make energy affordable and accessible to the world.

We are the most trusted energy-dedicated SaaS company, with a platform built to maximize value from generative AI, and our innovative solutions are reshaping the way energy is consumed and managed. By offering anytime, anywhere access to analytics and insights, we’re helping our customers make better decisions that help provide communities around the world with clean, affordable energy.

The energy industry is changing fast. But we’ve continued to lead the way in energy technology, creating intelligent connections across the entire energy ecosystem, from renewables, power and utilities, to oil and gas and financial institutions. Our solutions create more efficient production and distribution, capital allocation, renewable energy development, investment and sourcing, and help reduce costs by automating crucial business operations. Of course, this wouldn’t be possible without our people, which is why we have built a team of individuals from a diverse range of backgrounds.

Are you ready to help power the global quality of life? Join Enverus, and be a part of creating a brighter, more sustainable tomorrow.

The Utilities & AI Infrastructure team covers the full stack, from grid interconnection and utility rate cases down to chip architecture, accelerator supply chains, and data-center power delivery. Most competitors do one or the other. We do both, which takes people who can read a PCB block diagram and a utility integrated resource plan in the same afternoon. This is a research role, not a design or engineering role.

We're looking for an electrical engineer who wants to apply their technical background to competitive intelligence and market analysis. Someone who understands what's actually hard about designing a 1,000-watt GPU, why TSMC CoWoS yield matters to power-demand forecasts, and what it means when a hyperscaler switches from air to liquid cooling at scale. You'll translate that depth into research that executives, investors, and operators can act on.

Most research shops hand the hardest problems to the most senior person on the team and have everyone below execute. We do the opposite. Every analyst, including those at entry level, owns their projects end to end and pulls in senior teammates for guidance. That hands-on, problem-by-problem ownership is how you build the judgment to add real value for clients, and it's the single biggest reason people stay on this team.

Performance Objectives

• Analyze AI accelerator architectures (GPUs, ASICs, networking silicon) and their downstream implications for power consumption, thermal design, and infrastructure build-out.
• Track semiconductor supply-chain developments such as advanced-packaging capacity, HBM supply, and leading-edge fab utilization, and translate them into demand signals for power and cooling infrastructure.
• Monitor hyperscaler and co-location data-center build-out: rack-density trends, power-delivery design, cooling-technology transitions, and site selection.
• Synthesize technical findings into written research briefs, supply-chain maps, and competitive-intelligence products for internal and client audiences.
• Work with Enverus proprietary energy datasets to ground technical analysis in real grid and interconnection data.
• Cover earnings calls, investor days, conference presentations, and technical whitepapers from chipmakers, ODMs, OEMs, and utilities.

Competitive Candidate Profile

• A clear, precise writer who can make technical knowledge land for a non-engineer audience. In this role, that's the difference-maker: your analysis is only as valuable as your ability to communicate it.
• Bachelor's degree or higher in electrical engineering, computer engineering, or a closely related field.
• A strong grasp of digital systems, power electronics, or semiconductor fundamentals. You don't need to have taped out a chip, but you need to understand what a tapeout is and why it costs $50M.
• Ability to read and critically evaluate technical documentation: data sheets, white papers, patent filings, regulatory submissions.
• 0 to 4 years of experience. New graduates with strong research instincts are welcome.
• Hands-on experience with power systems, signal integrity, thermal management, or chip packaging, from coursework, internships, or personal projects.
• Prior exposure to the semiconductor industry through an internship, research, or closely following the space (TSMC, NVIDIA, AMD, Broadcom, Marvell, etc.).
• Familiarity with AI training and inference hardware: GPU clusters, networking topologies, memory-bandwidth constraints.
• Interest in energy markets, grid infrastructure, or the power economics of large-scale compute.
• Experience turning technical research into written deliverables.