Asic Design Verification Engineer

Apply UVM and C/C++ expertise to functional verification for complex ASICs and IP cores in a combined CPU/GPU development effort.This Verification Validation Engineer role supports design verification across blocks, chips, and systems. You will work with design and verification engineers while creating simulation tests, debugging results, and applying verification methodologies. The work involves active projects and increasingly complex SoC designs.Key Responsibilities:
Functionally verify complex ASIC and IP core blocksUnderstand design elements across block, chip, and system contextsDocument and execute directed and constrained-random test plansApply evolving verification methodologies to complex SoC designsUse hardware modeling or assertion-based verification methodsRequirements:
10+ years of verification experience on large ASIC projectsStrong C/C++ development background in Linux environmentsStrong debugging skills with GDB and ValgrindProficiency in object-oriented programming, STL, architecture, and data structuresUVM and design verification experience, with FPGA verification acceptableBring ASIC verification, UVM, C/C++, debugging, and analytical skills to complex CPU/GPU and SoC development.
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