Firmware Design Engineer

$73.5k - $136.5k per year

Cadence Design Systems

Montréal, QC

# Ingénieur en conception de micrologiciel / Firmware Design EngineerApplylocations: MOUNT-ROYAL (Montreal)time type: Full timeposted on: Posted Todayjob requisition id: R55507## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.**This role is for an existing vacancy.**Présentation de l’entreprise****L’avenir des solutions d’IP est arrivé**L’innovation électronique est présente partout, des capteurs intelligents aux villes intelligentes, et transforme la façon dont les gens travaillent, vivent et se divertissent. Cadence est fière de contribuer à cette innovation, non seulement à titre de chef de file mondial en automatisation de la conception électronique (EDA) depuis plus de 25 ans, mais aussi comme chef de file dans le développement de solutions d’IP, soit des blocs de conception réutilisables destinés aux systèmes sur puce.Les solutions d’IP de Cadence transformeront votre façon de concevoir et d’utiliser l’IP dans vos conceptions de systèmes sur puce (SoC). À mesure que vous intégrez davantage d’IP pour enrichir vos SoC de nouvelles fonctionnalités, nous pouvons vous aider à réduire la complexité et les risques inhérents à la conception de technologies intelligentes, tout en répondant à vos exigences en matière de performance, de superficie et de consommation d’énergie (PPA).Cadence est le fournisseur d’IP silicium qui connaît la plus forte croissance, avec un portefeuille éprouvé et de nombreuses premières dans l’industrie en matière d’IP de conception et d’IP de vérification. Les ingénieurs choisissent Cadence lorsqu’ils recherchent les meilleures solutions d’IP pour les interfaces, les mémoires, l’analogique, les périphériques, les processeurs et la vérification.**Notre objectif : une intégration parfaitement adaptée à votre SoC**Cadence offre une plateforme d’IP ouverte et une approche de type usine d’IP qui vous permettent de concevoir, de personnaliser et de vérifier l’IP ainsi que les sous-systèmes d’IP afin de les adapter à vos SoC d’une façon qui n’était pas possible auparavant. Nous travaillons avec vous pour veiller à ce que notre IP s’intègre le plus harmonieusement possible à vos conceptions. Les synergies croissantes au sein de notre portefeuille d’IP, ainsi qu’entre ce portefeuille et nos outils EDA, vous offrent une grande flexibilité et des avantages importants en matière de délai de mise sur le marché comparativement aux approches traditionnelles d’intégration d’IP.**La qualité est au cœur de nos activités, et non une considération secondaire**Cadence a mené à bien des milliers de mises en fabrication d’IP sur silicium, et ses solutions d’IP sont utilisées par plusieurs des plus grandes entreprises mondiales dans les secteurs des semi-conducteurs et des systèmes. Le programme d’assurance qualité de Cadence repose sur des politiques claires et documentées ainsi que sur des procédures reproductibles qui commencent dès la définition et le développement du produit, puis se poursuivent par les essais, la mise en production, la maintenance et le soutien continus. Ces procédures comprennent la spécification et la tenue à jour de définitions de produits suffisamment détaillées, ainsi que de plans d’essai et de mise en production pour chaque produit Cadence.**Détails du poste****Ingénieur en conception de micrologiciel pour PHY SERDES haute vitesse**Joignez-vous à une équipe dynamique et en pleine croissance composée d’ingénieurs chevronnés qui développent de l’IP physique pour des protocoles de liaisons série haute vitesse conformes aux normes de l’industrie. Nous recherchons une personne motivée, autonome et rigoureuse, capable de mener à bien ses responsabilités de façon indépendante, tout en contribuant activement à l’avancement des projets et au succès de l’équipe. La personne retenue participera à toutes les phases du développement de micrologiciel pour SERDES haute vitesse, de l’élaboration de l’architecture à l’implémentation, en passant par la vérification, les essais et le déploiement chez les clients.Dans ce rôle, vous serez appelé à :* Contribuer à l’élaboration de l’architecture du micrologiciel et à l’implémentation des fonctionnalités définies.* Collaborer étroitement avec l’équipe de vérification afin de déboguer et de corriger les problèmes de micrologiciel détectés lors des simulations de vérification.* Participer aux essais et à la validation post-silicium afin de cerner les problèmes de fonctionnalité ou de performance liés au micrologiciel ou au matériel, puis de mettre en œuvre les améliorations nécessaires au micrologiciel pour les résoudre.* Travailler avec les équipes d’ingénierie produit, de validation système et de conception afin de déboguer les problèmes d’IP rencontrés sur le terrain et de fournir des correctifs urgents.Vous aurez également l’occasion de :* Participer à la création d’un logiciel de contrôle de prototype au niveau système afin de développer et de valider des algorithmes d’adaptation, d’égalisation et de contrôle pour SERDES haute vitesse.* Implémenter les fonctionnalités de micrologiciel assignées et collaborer étroitement avec les équipes de vérification et de validation afin d’en assurer le bon fonctionnement et la robustesse.* Contribuer à l’implémentation de tests spécifiques au micrologiciel en collaboration avec l’équipe de vérification.* Appuyer l’équipe de validation pendant la caractérisation électrique et système.* Appuyer l’équipe d’ingénierie produit lors du déploiement de l’IP chez les clients.Profil recherché :* Solides connaissances en programmation C/C++ et Python.* Bonnes connaissances en vérification numérique, notamment en UVM et SystemVerilog.* Bonne compréhension des principes de communication filaire.* Connaissance de la conception de circuits à signaux mixtes et des techniques de traitement du signal numérique.* Solides compétences en résolution de problèmes et en communication.* Baccalauréat ou maîtrise en génie électrique.**Working COMPANY OVERVIEW****The Future of Intellectual Property is Here**Electronic innovation is everywhere, from smart sensors to smart cities, and it is transforming the way people work, live, and play. Cadence is excited to play a role in this innovation, not only as a world leader in electronic design automation (EDA) for over 25 years, but also as a driving force in the advancement of intellectual property (IP).Cadence IP solutions will change the way you think about and use IP in your system-on-chip (SoC) designs. As you use more IP to fortify your SoCs with new functionalities, we can help you reduce the complexity and risk inherent in designing for smart technology while meeting your performance, area, and power (PPA) requirements. Cadence is the fastest-growing silicon IP provider, with a proven portfolio and many industry firsts in design IP and verification IP. Engineers choose Cadence when they want the best in interface, memory, analog, peripherals, processor, and verification IP.**Our Goal: a Perfect Fit in Your SoC**Cadence provides an open IP platform and IP Factory approach so you can design, customize, and verify IP and IP subsystems to fit your SoCs in ways that weren’t possible before. We work with you to make sure our IP fits as seamlessly as possible into your designs. Growing synergies within our IP portfolio, and between our IP portfolio and EDA tools, provide you with important flexibility and time-to-market advantages over traditional IP integration approaches. **Quality is Integral to What We Do, Not an Afterthought**Cadence has amassed thousands of IP tape outs, and our IP solutions are in use by many of the world’s leading semiconductor and systems companies. The Cadence quality assurance program is based on clear, documented policies and reproducible procedures that begin in product definition and development and extend through testing and release to ongoing maintenance and support. Our procedures include specification and maintenance of appropriately detailed product definitions and test/release plans for every Cadence product.**POSITION DETAILS****High Speed SERDES PHY Firmware Design Engineer**This is an opportunity to join a dynamic and growing team of experienced engineers developing physical IP for industry-standard high-speed serial-link protocols. The successful candidate will ideally be a highly motivated self-starter who is able to work independently to complete assigned tasks and can also contribute to project leadership. It is expected that the candidate will contribute during all phases of firmware development for high speed SERDES from architecture development to implementation, verification, testing and customer deployment. This includes: * Contribution during firmware architecture development and implementation of the defined firmware features.* Working closely with verification team to debug and fix the FW issues found with verification simulations.* Involvement during post-silicon testing and validation to identify any FW and HW related functionality and performance issues and implement any necessary FW improvements to address these issues.* Interaction with Product Engineering, System Validation and Design team to debug IP issues in the field and provide hot fixes.Responsibilities include:* Help to build system level prototype control software to develop/validate adaptation, equalization, and control algorithms for high speed SERDES.* Implement assigned FW features and work closely with verification and validation team to ensure the functionality and robustness of the implemented features.* Support of Validation team during electrical and system characterization.* Support of Product Engineering team during customer deployment of the IP.Specific desired skills:* Solid programming knowledge in C/C++ and Python* Understanding of wireline communication principles* Knowledge in mixed signal circuit design and digital signal processing techniques* Strong problem solving and communication skills* BSc or MSc in Electrical Engineering*The annual salary range for Canada is $ 73,500.00 CAD/year -* 136,500.00 CAD/year*. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.**Our benefits programs include: paid vacation and holidays, leave of absence programs, Registered Retirement Savings Plan (RRSP), Tax Free Savings (TFSA) plan for post-tax investment savings, Employee Stock Purchase Plan, group health coverage that includes dental, vision and Emotional Wellbeing Support (EAP) benefits for you and your eligible dependents. Cadence also offers employee and dependent Life insurance, and short-term and long-term disability. In addition, Cadence provides Global Travel Medical coverage, Business Travel Accident Insurance, and a funded Lifestyle Spending Account (LSA).*
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