Principal Engineer at Synopsys - Memory Tech
Synopsys
Lead transformative projects in high-performance memory technologies at Synopsys as a Principal Engineer. Utilize your 15+ years of expertise in verification, firmware, and systems to drive innovation. As a Senior Principal Engineer, you will spearhead all verification efforts for memory interface technologies, specifically focusing on DDR and LPDDR. Your role involves close collaboration across hardware, digital, and analog domains to enhance workflow efficiency and tackle complex system issues effectively. Key Responsibilities:
- Direct memory interface PHY and controller verification
- Optimize firmware for enhanced system performance
- Establish and refine UVM verification environments
- Collaborate cross-functionally to resolve system issues
- Support silicon bring-up and testing processes
- 15+ years in technical leadership roles
- In-depth knowledge of high-speed interface protocols
- Solid background in UVM and System Verilog
- Experience debugging across firmware and digital design
- Excellent communication and mentoring skills
Vacancy posted 1 day ago
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