Sr Packaging Engineer I Job Description

Sr Packaging Engineer I Job Description Template

Our company is looking for a Sr Packaging Engineer I to join our team.

Responsibilities:

  • Design BGA packages for high frequency integrated circuits using Allegro Package Designer using SIP Layout;
  • IR Drop and PDN optimization in packages/interposers. Recommend caps on packages;
  • Recommend package layer stack-up, material, impedance targets and net assignments for signals;
  • Document design guidelines for package designs;
  • Develop package designs for signals exceeding 100Ghz GHz using RF transmission lines;
  • Complete transient channel simulation using Keysight ADS, HSPICE;
  • Complete package designs and parasitic extractions for Rambus products and IP Phys;
  • Optimize and implement routing for high-speed signals and power planes;
  • Complete system level PDN analysis using Keysight ADS, HSPICE;
  • Complete package extractions (signal and power) using Cadence tools (PowerSI) and Ansys tools (Electronics Desktop, HFSS, SiWave);
  • Proactively work on documentation in the form of user guide and integration guide to address customer integration questions;
  • Complete system level PDN analysis and recommend decoupling strategies;
  • Optimize single-ended/differential insertion loss, return loss, cross-talk for signals and high speed buses.

Requirements:

  • Have the ability to work well within a team environment;
  • Technically creative and results-oriented with the ability to manage multiple tasks;
  • Experience with IC package/interposer design tools such as Cadence APD or SiP;
  • High degree of self-motivation and personal responsibility;
  • Knowledge of high speed bump compliance including DDR3/DDR4/GDDR6. LPDDR4, PCIE3/4, 10GKR, 28G Ethernet, 56G PAM4. 112G PAM4;
  • Strong interpersonal, written and verbal skills to work with vendors and internal customers (design teams) and external customers;
  • Strong background in Electromagnetics and Transmission Line principles;
  • Strong understanding of package substrate manufacturing design rules and materials;
  • Bachelor’s and/or Master’s Degree in Electrical and/or Electronic Engineering, Computer Engineering or Physics;
  • Proficient in 2D/3D with modelling tools such as Cadence Sigrity, Ansoft HFSS/Q3D, Keysight ADS;
  • 5+ years relevant experience in high speed package design and signal integrity.