Junior Asic Emulation Engineer

SystemVerilog and Python power pre-silicon validation at Qualcomm Technologies in San Diego, where this onsite engineering role supports ASIC and FPGA designs.This Junior/Senior Emulation Engineer develops environments for complex SoC designs. The work combines RTL verification, system-level debugging, software-hardware co-validation, and automation. You will create testbenches and verification infrastructure using SystemVerilog, C/C++, Linux, shell scripting, and Python.Key Responsibilities:
Develop and maintain ASIC and FPGA emulation environmentsPort RTL designs onto emulation and FPGA platformsEnable early hardware/software co-validation with engineering teamsDebug functional, performance, and system-level emulation issuesCreate automation workflows for regressions and efficient debuggingRequirements:
Bachelor's or master's degree in a related technical fieldZero to two or more years in verification or emulationStrong SystemVerilog, C/C++, Linux, and Python skillsExperience with RTL debugging and waveform analysisKnowledge of SoC architectures and bus protocolsApply ASIC emulation, RTL verification, Python automation, and system debugging to pre-silicon validation at Qualcomm Technologies.
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