Principal Digital Design Engineer

Lead digital design and static timing analysis at Microchip Technology for advanced optical networking integrated circuits and connectivity solutions. Work across block and full-chip levels.As a Principal Engineer on Microchip’s Communications Business Unit Product Development team, you will lead digital design, DFT, physical implementation, and STA. You will support the semiconductor R&D lifecycle from concept through production release. The work uses Cadence and Synopsys synthesis suites across advanced technology nodes.Key Responsibilities:
Develop macro constraints, RAM generations, and flow configurationsOwn STA signoff across multiple modes and cornersDevelop and understand RTL synthesis flows and methodologiesCoordinate constraints and deliverables with RTL and DFT engineersEnsure netlist quality through CLP, LEC, and tool checksRequirements:
Bachelor’s or graduate degree in computer, electrical, electronics, or VLSI engineeringTen years’ synthesis, STA, and formal verification experienceStrong TCL, Perl, or Python coding and scripting skillsRTL design, UPF or CPF, and SoC STA signoff experienceSixteen-nanometer-or-smaller tapeout experience on one or more projectsApply digital design, synthesis, DFT, and timing expertise to Microchip’s advanced networking silicon development programs.
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