Principal system engineer

Avicena is a privately held company developing microLED based ultra-low power high bandwidth interconnects for chip-to-chip communications.  This technology will revolutionize High-Performance (HPC) and Cloud computing, as well as other industries where low power interconnects are critical like camera sensors, autonomous vehicles, and aerospace. Avicena is headquartered in Sunnyvale, California with a development center in Edinburgh, Scotland. The company was founded in 2019 by leading technologists from the optical networking industry with a track record of delivering breakthrough products.  ( )  Responsibilities: Lead a team of engineers to characterize optical transmitters, optical receivers and link performance of highly parallel opto-electronic interfaces Develop and maintain optical transmission system testing bed for full characterization of optical components and modules as well as system performance measurements Define and run link DOEs using uLED on ASIC transmitters, fiber bundle as transmission and PD on ASIC as receivers Characterize various aspects of both existing and potential future optical components such as evaluating signal-to-noise ratio (SNR), receiver sensitivity, bit-error-rate (BER), crosstalk, power consumptions and link budget of the transmission system Work with PCBA design engineers to design, fabricate and bring up test boards. Experience in schematic capture, circuit simulation and PCB design guidance Qualifications: MS or PhD in electrical engineering or physics with 6+ years of experience Expertise with optical transceiver circuits such as Trans-impedance Amplifier (TIA), laser/led drivers and photodetectors Familiarity with datacenter class optical module designs for Quad Small Form-factor Pluggable Octal Small Form Factor Pluggable (QSFP)/(OSFP) form factor pluggable modules or emerging Near-Packaged Optics (NPO) or Co-Packaged Optics (CPO) approaches. Experience with optical transceiver test methodologies Familiarity with industry standards including IEEE Ethernet standards, OIF standards and MSAs Preferred Qualifications: Ability to work cross-functionally with ASIC, packaging and optical design teams and provide clear technical inputs Strong verbal and written communication skills, and ability to articulate and engage with both technical and non-technical stakeholders at all levels Ability to code scripts in python for validation and data analysis Working knowledge of high-speed test instruments such as VNAs, sampling and real time oscilloscopes and spectrum analyzers Hands-on lab experience especially with probed/free space coupled (using stages) optical systems Knowledge of information theory, system partitioning and ability to derive block specification needed to meet desired system performance