Senior ASIC Engineer for WaveLogic Products

Join Ciena as a Senior ASIC Engineer in Ottawa and help innovate WaveLogic products. This full-time position focuses on ASIC design and integration enhancing optical networking solutions. Ciena is hiring an experienced engineer with 5+ years in ASIC design. This role requires collaboration across teams, interpreting designs, and developing top-level RTL. You will also maintain technology-specific libraries to ensure high-quality silicon delivery for telecommunications. Key Responsibilities:

• Contribute to ASIC design and integration for WaveLogic technology
• Develop and assemble top-level RTL integrating multiple IP blocks
• Analyze synthesis, timing, layout, and backend reports
• Create timing constraints to support designs
• Validate ASIC prototypes and production silicon in lab settings

Requirements:

• Bachelor’s degree in Electrical or Computer Engineering
• Over 5 years of ASIC design experience
• Proficient in Verilog, SystemVerilog, and Python
• Strong analytical skills and problem-solving abilities
• Excellent technical communication skills

Drive advancements in ASIC technology with Ciena's dynamic team. #J-18808-Ljbffr