Vhdl Fpga Rtl Design Engineer
Schweitzer Engineering Laboratories (SEL)
Design VHDL RTL digital logic for SEL communications products in Burnaby, BC, using FPGA development and functional verification skills.As an Engineer supporting SEL's R&D Communications product group, you will develop and support SONET/VSN Multiplexers, Ethernet gateways, network clocks, and switches. The work combines VHDL RTL design, hardware and firmware practices, networking protocols, and precise timing technologies. You will contribute to communication products serving critical infrastructure.Key Responsibilities:
Lead complex VHDL RTL digital logic projectsCreate and maintain internal RTL design documentationWrite test plans and develop RTL verification harnessesPrepare design and system level specificationsParticipate in peer reviews and project planningRequirements:
Bachelor's degree in Electrical Engineering or related disciplineFive-plus years of combined relevant experienceVHDL or Verilog FPGA RTL digital design experienceSimulation, synthesis, timing analysis, and functional verification experienceFirmware experience using C or C++ with FPGA systemsApply VHDL, FPGA, verification, and communications expertise to SEL digital logic development in Burnaby, British Columbia.
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Lead complex VHDL RTL digital logic projectsCreate and maintain internal RTL design documentationWrite test plans and develop RTL verification harnessesPrepare design and system level specificationsParticipate in peer reviews and project planningRequirements:
Bachelor's degree in Electrical Engineering or related disciplineFive-plus years of combined relevant experienceVHDL or Verilog FPGA RTL digital design experienceSimulation, synthesis, timing analysis, and functional verification experienceFirmware experience using C or C++ with FPGA systemsApply VHDL, FPGA, verification, and communications expertise to SEL digital logic development in Burnaby, British Columbia.
#J-18808-Ljbffr
Vacancy posted more than 2 months ago
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