Senior Asic Design Engineer, Compute Dsp/Ai Processors (Multiple Levels)
$124.2k - $174.2k per yearQualcomm
Company:
Qualcomm Canada ULCJob Area:
Engineering Group, Engineering Group >
ASICS EngineeringGeneral Summary:
Do you ever wonder when connected devices become thinking devices? Be part of the group that is working on technology that will bring “Cognition” to all connected devices: That means devices that don’t just react to their surroundings, they interact with the world.We are a compact, tightly knit ASIC IP team of architects, design, and verification engineers. We create HW IP in the heart of the Snapdragon DSP Neural Processing Unit (NPU) that works in coordination with the other NPU components to accelerate AI machine learning, video and other dsp applications. We’re continuously evolving and improving our design and verification architectures to tackle complex engineering problems. To achieve the high standards of Qualcomm products, our team members contribute with a variety of skills and participate in many aspects of the design, verification, and final product evaluation processes.Responsibilities:
Design high speed, high bandwidth, low power digital hardware solutions using SystemVerilogTake on the challenge of achieving the high performance goals of the product while minimizing power and areaResolve architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervisionContribute to definition, micro-architecture and documentation of HW IPCollaborate closely with the Verification team to test and debug new HW IPCollaborate closely with the Verification team to close coverage on new HW IPCreate assertion based models for functional and formal verification using SystemVerilogCreate functional coverage models using SystemVerilogEvaluate synthesis results to verify the design meets the speed, power and area targetsSupport internal hardware integration SW teams around the worldSupport internal software teams during their application testingCollaborate with software teams to develop new featuresUse of various design tools (VCS Simulator, Synopsys Compiler, Linting, CDC, LEC, CLP etc.) to check and improve design qualityProvide ideas and further the innovation of ASICs, IP cores, and process flowsQualifications:
Strong problem solving and analytical thinking skillsFirst-time-right hardware requires an attention to detail and careful planningExcellent communication skillsSelf-motivated, goal oriented, team playerNew Grad:
Bachelors - Engineering, Computer EngineeringUnderstanding of digital logicsome design experience, whether in work, co-op, or courseworkSenior or above:
2+ years of direct experience in ASIC design, debug verification, synthesis, SystemVerilog, design tools (Synopsys, Cadence, Mentor) and flows,Understand high performance processor design for high speed and low powerMinimum Qualifications:
Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail View email address on ca.hrm.tc or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.Pay range and Other Compensation & Benefits:
$124,200.00 - $174,200.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.
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Qualcomm Canada ULCJob Area:
Engineering Group, Engineering Group >
ASICS EngineeringGeneral Summary:
Do you ever wonder when connected devices become thinking devices? Be part of the group that is working on technology that will bring “Cognition” to all connected devices: That means devices that don’t just react to their surroundings, they interact with the world.We are a compact, tightly knit ASIC IP team of architects, design, and verification engineers. We create HW IP in the heart of the Snapdragon DSP Neural Processing Unit (NPU) that works in coordination with the other NPU components to accelerate AI machine learning, video and other dsp applications. We’re continuously evolving and improving our design and verification architectures to tackle complex engineering problems. To achieve the high standards of Qualcomm products, our team members contribute with a variety of skills and participate in many aspects of the design, verification, and final product evaluation processes.Responsibilities:
Design high speed, high bandwidth, low power digital hardware solutions using SystemVerilogTake on the challenge of achieving the high performance goals of the product while minimizing power and areaResolve architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervisionContribute to definition, micro-architecture and documentation of HW IPCollaborate closely with the Verification team to test and debug new HW IPCollaborate closely with the Verification team to close coverage on new HW IPCreate assertion based models for functional and formal verification using SystemVerilogCreate functional coverage models using SystemVerilogEvaluate synthesis results to verify the design meets the speed, power and area targetsSupport internal hardware integration SW teams around the worldSupport internal software teams during their application testingCollaborate with software teams to develop new featuresUse of various design tools (VCS Simulator, Synopsys Compiler, Linting, CDC, LEC, CLP etc.) to check and improve design qualityProvide ideas and further the innovation of ASICs, IP cores, and process flowsQualifications:
Strong problem solving and analytical thinking skillsFirst-time-right hardware requires an attention to detail and careful planningExcellent communication skillsSelf-motivated, goal oriented, team playerNew Grad:
Bachelors - Engineering, Computer EngineeringUnderstanding of digital logicsome design experience, whether in work, co-op, or courseworkSenior or above:
2+ years of direct experience in ASIC design, debug verification, synthesis, SystemVerilog, design tools (Synopsys, Cadence, Mentor) and flows,Understand high performance processor design for high speed and low powerMinimum Qualifications:
Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail View email address on ca.hrm.tc or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.Pay range and Other Compensation & Benefits:
$124,200.00 - $174,200.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.
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Vacancy posted 1 hour ago
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