Verification Engineer with ASIC Focus

Explore a dynamic role at Celero Communication Inc. as a Verification Engineer specializing in ASIC design verification. Contribute to innovative solutions for advanced AI and data center technologies. This position focuses on developing verification plans and maintaining rigorous testbenches using SystemVerilog and UVM. You will create and execute test cases to validate performance and power metrics, collaborating closely with design and system teams for optimal results. Key Responsibilities:

• Design implementation for complex ASIC verification plans
• Maintain and create testbenches in SystemVerilog and UVM
• Execute test cases to ensure functionality and performance
• Collaborate with teams to debug design issues
• Conduct functional and code coverage analysis

Requirements:

• Bachelor’s degree in Electrical or Computer Engineering
• Over 3 years of experience in ASIC verification
• Skilled in Verilog, SystemVerilog, and UVM
• Strong grasp of ASIC design methodologies
• Excellent problem-solving and communication skills

Apply your expertise to enhance verification processes at Celero Communication Inc. #J-18808-Ljbffr