Fpga Digital Logic Verification Engineer

Build and verify FPGA digital logic for SEL's communications portfolio in Burnaby, BC, with VHDL, test planning, and timing analysis expertise.This Engineer works within SEL's R&D Communications product group on SONET/VSN Multiplexers, Ethernet Circuit Emulation Gateways, network clocks, and Ethernet switches. The position emphasizes RTL functional verification, test harnesses, simulation, synthesis, timing analysis, and accurate technical documentation. It also involves preparing specifications and reviewing designs with cross-discipline teams.Key Responsibilities:
Develop test harnesses and stimulus for RTL verificationPrepare design and system level specificationsMaintain accurate RTL design documentationModerate peer reviews of designs and test plansSupport communication product development and enhancementsRequirements:
Five-plus years across RTL, hardware, and firmware practicesFPGA design using VHDL or VerilogSimulation, synthesis, and digital logic timing analysisFunctional verification of RTL digital logicStrong technical writing, documentation, and speaking skillsUse verification, FPGA, and digital logic skills to support SEL communication products and reliable electric power systems.
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