High-Speed Semiconductor Package Layout Engineer

Shape semiconductor interconnect designs with high-speed layout expertise, advanced EDA tools, and wafer-level technologies at Semtech Corporation.As a Package and PCB Layout Engineer, you will contribute to the Signal Integrity Products business unit’s R&D hardware design community. Your focus may span multilayer substrates, carrier layouts, wafer redistribution layers, and wafer reconstruction technologies. The work supports innovative designs across varied interconnect technologies.Key Responsibilities:
Assess package feasibility with signal integrity expertsCreate substrate and carrier layouts for advanced IC configurationsDevelop wafer-level interconnect layouts using reconstruction technologiesApply layout expertise across high-speed interconnect technologiesCoordinate activities with suppliers and cross-functional teamsRequirements:
Bachelor’s degree in engineering, physics, or related fieldFive years’ experience in high-speed package or PCB layoutAdvanced knowledge of Cadence APD and Allegro desiredUnderstanding of RF, analog, and digital circuitsKnowledge of mechanical, thermal, and optical designBring semiconductor layout experience, wafer-level interconnect knowledge, and high-speed design skills to Semtech’s R&D team.
#J-18808-Ljbffr