Senior Front End Asic Engineer In Toronto
Ethernovia
Join Ethernovia, a trailblazer in Ethernet-based networks, as a Senior Front End ASIC Engineer. This hybrid role demands expertise in digital SoC design and advanced automotive communications.
As part of Ethernovia's innovative team in Toronto, you will take charge of digital SoC design facets including micro-architecture specifications, RTL, and verification processes. Your experience with ASICs will aid in delivering high-performance custom silicon for various applications. Collaborate with multidisciplinary engineers to define complex product specifications, ensuring alignment with engagement protocols, algorithms, and software interfaces.
Key Responsibilities: - Lead digital SoC design and development - Collaborate with architects on automotive semiconductor systems - Verify and synthesize ASICs ensuring power, performance, and area goals - Flesh out product definitions with detailed specifications - Serve as a self-motivated engineer with minimal oversight
Requirements: - 10+ years of ASIC RTL design experience - Relevant degree in Electrical Engineering or Computer Science - Proven experience in complex SoC development - Deep understanding of digital design methodologies - Proficient in Verilog/System Verilog
Embrace a pivotal role with Ethernovia to shape the future of network solutions in autonomous vehicles.#J-18808-Ljbffr
As part of Ethernovia's innovative team in Toronto, you will take charge of digital SoC design facets including micro-architecture specifications, RTL, and verification processes. Your experience with ASICs will aid in delivering high-performance custom silicon for various applications. Collaborate with multidisciplinary engineers to define complex product specifications, ensuring alignment with engagement protocols, algorithms, and software interfaces.
Key Responsibilities: - Lead digital SoC design and development - Collaborate with architects on automotive semiconductor systems - Verify and synthesize ASICs ensuring power, performance, and area goals - Flesh out product definitions with detailed specifications - Serve as a self-motivated engineer with minimal oversight
Requirements: - 10+ years of ASIC RTL design experience - Relevant degree in Electrical Engineering or Computer Science - Proven experience in complex SoC development - Deep understanding of digital design methodologies - Proficient in Verilog/System Verilog
Embrace a pivotal role with Ethernovia to shape the future of network solutions in autonomous vehicles.#J-18808-Ljbffr
Vacancy posted 2 hours ago
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