Principal Asic Design Engineer At Amd
Advanced Micro Devices, Inc.
Elevate your engineering career as a Principal ASIC Design Engineer at AMD in Markham, Ontario. Lead the development of cutting-edge IP solutions, focusing on AI-driven data movement and performance optimization.
As a senior member of the IOHUB team, you'll provide technical leadership for next-generation technologies across various markets. Your expertise in silicon solutions will help transform complex product requirements into high-quality designs. Collaborate across multidisciplinary teams and influence technical strategy while mentoring engineers in best practices.
Key Responsibilities: - Lead IOHUB IP development from architecture to validation - Partner with teams to evaluate trade-offs and define requirements - Ensure design quality meets power and performance goals - Collaborate across departments for successful product delivery - Mitigate risks and establish effective execution strategies
Requirements: - Proven leadership in ASIC design with successful tape-outs - Deep expertise in RTL design and microarchitecture - Strong knowledge of design verification and timing closure - Proficiency in Verilog and scripting languages - Excellent communication skills for technical presentations
Drive architecture innovation and promote quality engineering solutions at AMD.#J-18808-Ljbffr
As a senior member of the IOHUB team, you'll provide technical leadership for next-generation technologies across various markets. Your expertise in silicon solutions will help transform complex product requirements into high-quality designs. Collaborate across multidisciplinary teams and influence technical strategy while mentoring engineers in best practices.
Key Responsibilities: - Lead IOHUB IP development from architecture to validation - Partner with teams to evaluate trade-offs and define requirements - Ensure design quality meets power and performance goals - Collaborate across departments for successful product delivery - Mitigate risks and establish effective execution strategies
Requirements: - Proven leadership in ASIC design with successful tape-outs - Deep expertise in RTL design and microarchitecture - Strong knowledge of design verification and timing closure - Proficiency in Verilog and scripting languages - Excellent communication skills for technical presentations
Drive architecture innovation and promote quality engineering solutions at AMD.#J-18808-Ljbffr
Vacancy posted 33 minutes ago
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