Entry-Level ASIC Verification Engineer Ottawa

Launch your engineering journey at Renesas as an onsite ASIC Digital Verification Engineer. In this entry-level role, engage in advanced mixed-signal design challenges. Renesas is seeking an entry-level ASIC Digital Verification Engineer in Ottawa. Ideal candidates include those with a Bachelor’s degree and up to two years of experience, as well as recent Master’s graduates eager to learn. You will work on Digital PLL circuit design and verification, utilizing SystemVerilog and UVM technologies to make an impact in the semiconductor industry. Key Responsibilities:

• Implement test cases based on functional specs
• Enhance verification infrastructure as technology evolves
• Conduct regression triage and simulation debugging
• Collaborate with local and remote design teams

Requirements:

• Bachelor’s degree with up to 2 years of experience
• Familiarity with verification methodologies required
• Proficiency in SystemVerilog and UVM environments
• Experience with tiered simulation tools
• Ability to work in Unix/Linux systems

Grow your verification skills and contribute to innovative projects at Renesas in Ottawa. #J-18808-Ljbffr