Principal DSP Firmware Engineer at Celero

Take the lead in DSP firmware innovation with Celero Communications as a Principal Engineer. Direct the development of advanced DSP algorithms while optimizing real-time firmware performance.

In this senior role, you'll architect and implement DSP firmware, driving strategy from inception to deployment. Collaborate with system architects and DSP designers, optimizing for latency and resource usage while mentoring junior engineers to foster growth and expertise in the field.

Key Responsibilities: • Lead architecture and design of DSP firmware • Define control interfaces and debug diagnostics • Optimize firmware for latency and throughput • Drive regression strategies for customer releases • Analyze logs and oversee DSP acquisition bring-up

Requirements: • Bachelor’s or Master’s in Electrical Engineering • 6–10 years in embedded/firmware development • Strong background in DSP theory and algorithms • Expert in C/C++ and firmware architecture • Familiar with FPGA and testing frameworks

Shape the future of DSP technology and mentor rising engineers at Celero Communications. #J-18808-Ljbffr