Physical Design Engineer II (PNR/Physical Verification/STA/EMIR) (Montreal)
Cadence Design Systems
The candidate will have the prospect to work on many varieties of challenging designs, i.e. low power and high speed design.
Main Job Tasks and Responsibilities
- Participating in or leading next-generation physical design, methodology, and flow development in advanced technology nodes.
- Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.
Position Requirements
- Bachelor or above degree in majors of EE/CS/IT, with 3+ years work experience.
- Extensive knowledge of the design rule for the process of N7/N5 and below.
- Knowledge of scripting languages and use in methodology.
- Ability of fixing the physical design violations, including: DRC, DFM, LVS, ANT, ERC etc.
- Deep experience of static timing analysis.
- Ability to learn quickly.
- High level of communication and teamwork.
- Carefulness, responsibility, and persistence.
We welcome applications from candidates with disabilities and in equity seeking groups.
#J-18808-LjbffrVacancy posted more than 2 months ago
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