Silicon Validation Engineer
Synopsys Inc
We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You AreYou have spent years in the lab, hands on equipment, watching waveforms that tell you what the circuit is actually doing versus what the design team hoped it would do. The gap between those two things is where you live. You know that a BERT plot at 3am can answer questions that three weeks of simulation cannot, and you have learned to trust what silicon tells you even when it contradicts the model.
You are comfortable moving between theory and practice without getting stuck in either. One hour you are debugging a PAM-4 eye closure issue with a sampling scope, the next you are explaining the root cause to a design team in terms they can act on. You do not just run tests, you design them. You think about what could go wrong, what the standard actually requires versus what people assume it requires, and how to prove compliance in a way that will hold up when a customer plugs the IP into their SoC.
You have strong opinions about test methodology, signal integrity, and what good data looks like. At Synopsys, you will work on mixed-signal IP that ships into high-performance designs across the industry, and the validation work you do will be the difference between a successful tapeout and a costly respin.
What You’ll Be Doing
Validate and characterize high-speed mixed-signal IP including SerDes, ADC, DAC, and related analog circuits in a lab environment using BERTs, real-time and sampling oscilloscopes, VNAs, and TDRs
Develop test plans and methodologies that prove compliance with electrical standards and protocol specifications, not just functional operation but margin, corner case behavior, and interoperability
Debug silicon issues by analyzing circuit behavior, correlating lab results with design intent, and working directly with analog designers and systems engineers to identify root cause and drive fixes
Design and build test boards and hardware setups to support validation, including schematic entry, component selection, and PCB layout coordination
Automate test sequences and data analysis using Python and MATLAB, turning raw measurements into actionable insights and clear reports for design teams and customers
Specify and source new test equipment and components as validation requirements evolve, ensuring the lab stays equipped to handle next-generation IP
Generate detailed test reports documenting results, methodologies, pass/fail criteria, and recommendations that engineering and customer teams can use to make decisions
The Impact You Will Have
Ensure Synopsys mixed-signal IP meets industry standards and customer expectations before it ships, reducing the risk of costly silicon respins and field issues
Provide the data and insights that design teams need to close on performance targets, optimize circuits, and confidently tape out
Build test methodologies and automation that scale across multiple IP products, making validation faster and more repeatable as the portfolio grows
Serve as the technical bridge between lab results and design decisions, translating complex measurements into clear guidance that moves projects forward
Contribute to the competitiveness of Synopsys IP by proving performance, margin, and compliance in ways that differentiate our products in the market
Mentor and influence validation practices across the R&D organization, raising the bar for how we qualify and characterize silicon
Support customer engagements by demonstrating IP performance, troubleshooting integration issues, and building confidence in our solutions
What You’ll Need
Master's degree in Electrical or Electronics Engineering with 6+ years of experience in post-silicon validation, lab instrumentation, characterization, and debug, or Bachelor's degree with 7+ years of equivalent experience
Deep hands-on experience with lab equipment including BERTs, real-time oscilloscopes, sampling oscilloscopes, VNAs, and TDRs in the context of high-speed mixed-signal circuit validation
Strong working knowledge of analog and mixed-signal circuit design, operation, and failure modes, you need to understand what the circuit is trying to do to validate it effectively
Proficiency in MATLAB and Python for test automation, data analysis, and post-processing of measurement results
Solid grounding in signals and systems, signal integrity, and the electrical behavior of high-speed interfaces
Experience with PAM-4 signaling test and debug is a strong plus, as is background in SerDes, ADC, or DAC validation
Familiarity with schematic entry tools, PCB design and layout, signal integrity and power integrity principles, and data mining techniques for test results will set you apart
Who You Are
You can look at a waveform or a BERT scan and immediately know whether the result makes sense or whether something is wrong with the setup, the circuit, or the test itself
You do not wait for perfect documentation or a fully defined test plan, you figure out what needs to be proven, design the test, and execute
You can explain a complex signal integrity issue to an analog designer in one conversation and to a customer FAE in another, adjusting your language without losing the technical depth
You are organized enough to manage multiple validation efforts in parallel, track issues to closure, and document your work in a way that others can build on
You push back when a test plan is incomplete, a specification is ambiguous, or a result does not match what the design team expected, you care about getting it right
You are comfortable working in a lab environment for extended periods, including hands-on hardware debug, board rework, and equipment troubleshooting
Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#J-18808-Ljbffr
You AreYou have spent years in the lab, hands on equipment, watching waveforms that tell you what the circuit is actually doing versus what the design team hoped it would do. The gap between those two things is where you live. You know that a BERT plot at 3am can answer questions that three weeks of simulation cannot, and you have learned to trust what silicon tells you even when it contradicts the model.
You are comfortable moving between theory and practice without getting stuck in either. One hour you are debugging a PAM-4 eye closure issue with a sampling scope, the next you are explaining the root cause to a design team in terms they can act on. You do not just run tests, you design them. You think about what could go wrong, what the standard actually requires versus what people assume it requires, and how to prove compliance in a way that will hold up when a customer plugs the IP into their SoC.
You have strong opinions about test methodology, signal integrity, and what good data looks like. At Synopsys, you will work on mixed-signal IP that ships into high-performance designs across the industry, and the validation work you do will be the difference between a successful tapeout and a costly respin.
What You’ll Be Doing
Validate and characterize high-speed mixed-signal IP including SerDes, ADC, DAC, and related analog circuits in a lab environment using BERTs, real-time and sampling oscilloscopes, VNAs, and TDRs
Develop test plans and methodologies that prove compliance with electrical standards and protocol specifications, not just functional operation but margin, corner case behavior, and interoperability
Debug silicon issues by analyzing circuit behavior, correlating lab results with design intent, and working directly with analog designers and systems engineers to identify root cause and drive fixes
Design and build test boards and hardware setups to support validation, including schematic entry, component selection, and PCB layout coordination
Automate test sequences and data analysis using Python and MATLAB, turning raw measurements into actionable insights and clear reports for design teams and customers
Specify and source new test equipment and components as validation requirements evolve, ensuring the lab stays equipped to handle next-generation IP
Generate detailed test reports documenting results, methodologies, pass/fail criteria, and recommendations that engineering and customer teams can use to make decisions
The Impact You Will Have
Ensure Synopsys mixed-signal IP meets industry standards and customer expectations before it ships, reducing the risk of costly silicon respins and field issues
Provide the data and insights that design teams need to close on performance targets, optimize circuits, and confidently tape out
Build test methodologies and automation that scale across multiple IP products, making validation faster and more repeatable as the portfolio grows
Serve as the technical bridge between lab results and design decisions, translating complex measurements into clear guidance that moves projects forward
Contribute to the competitiveness of Synopsys IP by proving performance, margin, and compliance in ways that differentiate our products in the market
Mentor and influence validation practices across the R&D organization, raising the bar for how we qualify and characterize silicon
Support customer engagements by demonstrating IP performance, troubleshooting integration issues, and building confidence in our solutions
What You’ll Need
Master's degree in Electrical or Electronics Engineering with 6+ years of experience in post-silicon validation, lab instrumentation, characterization, and debug, or Bachelor's degree with 7+ years of equivalent experience
Deep hands-on experience with lab equipment including BERTs, real-time oscilloscopes, sampling oscilloscopes, VNAs, and TDRs in the context of high-speed mixed-signal circuit validation
Strong working knowledge of analog and mixed-signal circuit design, operation, and failure modes, you need to understand what the circuit is trying to do to validate it effectively
Proficiency in MATLAB and Python for test automation, data analysis, and post-processing of measurement results
Solid grounding in signals and systems, signal integrity, and the electrical behavior of high-speed interfaces
Experience with PAM-4 signaling test and debug is a strong plus, as is background in SerDes, ADC, or DAC validation
Familiarity with schematic entry tools, PCB design and layout, signal integrity and power integrity principles, and data mining techniques for test results will set you apart
Who You Are
You can look at a waveform or a BERT scan and immediately know whether the result makes sense or whether something is wrong with the setup, the circuit, or the test itself
You do not wait for perfect documentation or a fully defined test plan, you figure out what needs to be proven, design the test, and execute
You can explain a complex signal integrity issue to an analog designer in one conversation and to a customer FAE in another, adjusting your language without losing the technical depth
You are organized enough to manage multiple validation efforts in parallel, track issues to closure, and document your work in a way that others can build on
You push back when a test plan is incomplete, a specification is ambiguous, or a result does not match what the design team expected, you care about getting it right
You are comfortable working in a lab environment for extended periods, including hands-on hardware debug, board rework, and equipment troubleshooting
Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#J-18808-Ljbffr
Vacancy posted 58 minutes ago
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