Analog/RF Layout Engineer

Incumbent will work along our layout engineers and RF designers to build detailed transistor-level layout of RF and analog circuit blocks including bandgap/bias/LDO, ADC/DAC, baseband filters, modulators, power amplifiers, PLL, LO generation, LNA, and Mixer.

Will be responsible to provide highly quality layout to pass our verification flows including extraction, DRC, LVS, and DFM checking. Layout quality will be reviewed for power/gnd routing, electromigration, signal path check, diAerential and IQ matching, and signal coupling.

Minimum Qualifications

• FinFET experience, N5/N3/N2 or more advanced.

• 5+ Experience in custom RF/analog layout for analog or RF transceivers with extensive knowledge of deep sub-micron CMOS.

• High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc.

• Knowledge of CADENCE layout tools, like Virtuoso Layout XL.

• Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing.

• Solid understanding of RC delay, electromigration, and coupling.

• Understanding of guard rings, DNW, PN junctions, and advanced process eAects such as LOD, WPE, etc.

• Excellent communication skills and able to co-work with designers