Senior FPGA Design/Verification Engineer

Title: Senior FPGA Design/Verification Engineer

Employment Type: Full-time, permanent

Location: Ottawa ON, onsite

Role Overview

This full‑time position is an opportunity to work in a leading high‑technology telecommunications company. You will be part of a multidisciplinary team that develops a broad range of optical telecommunication products including next‑generation optical switches and amplifiers.

Responsibilities

• Architecture and implementation of control and datapath logic, IP core configuration and integration.
• Develop and maintain simulation environments, including scripts, testbenches, test cases, and bus functional models. Define and execute comprehensive verification plans.
• Collaborate with hardware and firmware engineers for cross‑functional integration and lab validation, ensuring system‑level performance goals are met. Develop and execute scripts for automated testing.
• Constraints implementation and optimization, thorough build and timing reports analysis to ensure robustness.
• Create and maintain high‑quality design and test documentation, contributing to project knowledge bases and future reference.
• Provide guidance to junior engineers and work with the team to foster best practices in design, verification, and methodologies. Welcome and provide feedback during design reviews.

Required Qualifications

• Strong experience in ASIC or FPGA design and simulation using Verilog/SystemVerilog.
• Strong experience with synthesis, constraints, timing analysis, clock domain crossing.
• Team player working well with different functional groups and contributing effectively to multi‑designer projects.
• Clear, robust and well‑commented coding style.
• Strong problem‑solving, troubleshooting and debugging skills.
• Excellent verbal and written communication skills.
• Thorough and detail oriented.

Preferred Qualifications (Assets)

• Strong experience with AMD (Xilinx) or Altera FPGAs and tools.
• Experience with Constrained Random Verification, SystemVerilog Assertions, and advanced UVM methodologies.
• Experience with embedded processor SoC design.
• Experience with PCIe, DDR memory, and AXI interfaces.
• Knowledge of digital signal processing concepts.
• VHDL, C, Csh, Tcl, Python, Perl.
• Familiarity with Linux environment development.

Benefits

• Flexible time off.
• Health and wellness benefits (physical and mental).
• Tuition reimbursement and career growth support.
• Free gym, games room, prayer room.
• Subsidized meals, free coffee/tea.
• Employee stock options and incentive plans.
• Collaborative, innovative, and inclusive culture.

Equal Opportunity Employer Statement

We’re committed to building an inclusive workplace where everyone feels valued and empowered. We welcome applicants from all backgrounds and provide accommodations for individuals with disabilities throughout the hiring process. Your uniqueness makes us stronger, sparks creativity, and drives our success.

Please contact us at View email address on apply.j-vers.com to request accommodation.