Fpga Digital Design Engineer (6+ Month Contract)
Kepler Communications Inc.
At Kepler Communications, we're not just imagining the future of on-demand space connectivity - we're leading it! Our mission is to provide real-time on-orbit connectivity for critical missions, enabling a new era of data-driven intelligence and innovation. With 33 satellites launched to date, Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities. Industry-leading technology is only part of the story. What sets Kepler apart is our team: bold thinkers, skilled builders, and passionate problem-solvers who thrive on pushing the boundaries ofwhat’spossible in space. We believe great ideas come from diverse perspectives, andwe’recommitted to creating an environment where you can grow, lead, and make a global impact.Ifyou’reready to reach higher, move faster, and do work that shapes the future space economy - this is your launchpad. Come build the future with Kepler!What We Offer:
Competitive compensationwith a robust equity plan to share in our success.Comprehensive coverage for health, dental, and vision insurance—including dependents.Unlimited vacation, supportive parental leave policy,and company-wide holiday shutdown.Semi-annual company-wide partiesand frequent in-office team events.Relocation packagesavailable for approved roles.$1,500 annual professional development fundto support your growth.Fully stocked Toronto office kitchenwith snacks, drinks, games and top-notch kitchen appliances.Town Halls, Celebration Calls, and Company-wide eventsto stay connected and engaged.We’re a certifiedGreat Place to Work, seven years in a row!We’re on the hunt for a top-tier FPGA Digital Design Engineer for a 6+ month contract to develop the next generation of our satellites.At Kepler, you’ll have the opportunity to work with a dedicated team of engineers building the Kepler spacecraft. You will be responsible for the design and implementation of FPGA code either with a focus on DSP algorithms to modulate and demodulate signals on board our software defined radio (SDR), or embedded systems interfacing with processors and peripherals. To be effective you will need to participate in all phases of FPGA design flow (Simulation, Synthesis, Place & Route, Timing Closure and Hardware Testing). A good understanding of the intricacies of FPGA development would make a candidate standout.Key Responsibilities:
Develop custom IP for new features of the Kepler satellite digital payloadsIterate on current DSP and interface designs to improve reliabilityWork with IP core vendors to integrate new functionality into the Kepler designsWork with lead engineers in developing the communications and network architecture of our future satellite constellationParticipate in conceptual design studies of new spacecraftRequired Skills & Qualifications:
Bachelor’s Degree in Computer Engineering, Electrical Engineering or equivalent5+ yr. working experience with FPGA/RTL designVerilog, SystemVerilog, or VHDL with the willingness to learn or pivot to SystemVerilogXilinx FPGA(s). Specifically, Zynq and UltraScaleSolid understanding of timing principles, including clock domain crossing and timing closureStrong scripting skills (e Python, Tcl, csh/bash, etc.)Experience with FPGA tools (e.G Vivado, Quartus), HDL Simulation Tools (ModelSim)Bonus Points:
Masters of Science in Computer/Electrical Engineering, or equivalentExperience in coherent digital demodulation of waveforms such as BPSK, QPSK, QAMExperience with memory mapped interfaces such as AXI, Wishbone, AvalonExperience with high-speed transceivers for protocols such as JESD204B, PCIe, SATAExperience with Linting tools, Questa Sim or Riviera-ProExperience with Xilinx Versal and RFSoCExperience designing printed circuit boardsKnowledge of radio-frequency electronics designEmployment Equity & Accommodation Statement
Kepler Communications is an equal opportunity employer committed to building a diverse and inclusive workplace. We welcome applications from all qualified individuals, including women, Indigenous peoples, persons with disabilities, members of visible minorities, and people of all sexual orientations and gender identities.If you require accommodation during any stage of the recruitment process, please contact our People & Culture team at View email address on ca.hrm.tc, and we will work with you to meet your needs.
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Competitive compensationwith a robust equity plan to share in our success.Comprehensive coverage for health, dental, and vision insurance—including dependents.Unlimited vacation, supportive parental leave policy,and company-wide holiday shutdown.Semi-annual company-wide partiesand frequent in-office team events.Relocation packagesavailable for approved roles.$1,500 annual professional development fundto support your growth.Fully stocked Toronto office kitchenwith snacks, drinks, games and top-notch kitchen appliances.Town Halls, Celebration Calls, and Company-wide eventsto stay connected and engaged.We’re a certifiedGreat Place to Work, seven years in a row!We’re on the hunt for a top-tier FPGA Digital Design Engineer for a 6+ month contract to develop the next generation of our satellites.At Kepler, you’ll have the opportunity to work with a dedicated team of engineers building the Kepler spacecraft. You will be responsible for the design and implementation of FPGA code either with a focus on DSP algorithms to modulate and demodulate signals on board our software defined radio (SDR), or embedded systems interfacing with processors and peripherals. To be effective you will need to participate in all phases of FPGA design flow (Simulation, Synthesis, Place & Route, Timing Closure and Hardware Testing). A good understanding of the intricacies of FPGA development would make a candidate standout.Key Responsibilities:
Develop custom IP for new features of the Kepler satellite digital payloadsIterate on current DSP and interface designs to improve reliabilityWork with IP core vendors to integrate new functionality into the Kepler designsWork with lead engineers in developing the communications and network architecture of our future satellite constellationParticipate in conceptual design studies of new spacecraftRequired Skills & Qualifications:
Bachelor’s Degree in Computer Engineering, Electrical Engineering or equivalent5+ yr. working experience with FPGA/RTL designVerilog, SystemVerilog, or VHDL with the willingness to learn or pivot to SystemVerilogXilinx FPGA(s). Specifically, Zynq and UltraScaleSolid understanding of timing principles, including clock domain crossing and timing closureStrong scripting skills (e Python, Tcl, csh/bash, etc.)Experience with FPGA tools (e.G Vivado, Quartus), HDL Simulation Tools (ModelSim)Bonus Points:
Masters of Science in Computer/Electrical Engineering, or equivalentExperience in coherent digital demodulation of waveforms such as BPSK, QPSK, QAMExperience with memory mapped interfaces such as AXI, Wishbone, AvalonExperience with high-speed transceivers for protocols such as JESD204B, PCIe, SATAExperience with Linting tools, Questa Sim or Riviera-ProExperience with Xilinx Versal and RFSoCExperience designing printed circuit boardsKnowledge of radio-frequency electronics designEmployment Equity & Accommodation Statement
Kepler Communications is an equal opportunity employer committed to building a diverse and inclusive workplace. We welcome applications from all qualified individuals, including women, Indigenous peoples, persons with disabilities, members of visible minorities, and people of all sexual orientations and gender identities.If you require accommodation during any stage of the recruitment process, please contact our People & Culture team at View email address on ca.hrm.tc, and we will work with you to meet your needs.
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