Senior Mask Layout Design Engineer

Design complex mask layouts and floorplans at Qualcomm Canada ULC, using Cadence, LVS, and rmap for verification. Work independently across teams and stakeholders.This engineering services role develops block, macro, and chip-level layouts from project requirements, specifications, and schematics. You will interpret electronic principles, apply layout techniques, and lead work across multiple projects. The position includes technical guidance, troubleshooting, and communication with internal and external stakeholders.Key Responsibilities:
Lead complex layout requirements and schematic interpretationBuild macro layouts and floorplans meeting PPA and yield needsManage top-level testing and validation using Cadence, LVS, and rmapDevelop design guidelines, manuals, processes, and checklistsLead project priorities, deadlines, deliverables, and resource assignmentsRequirements:
Bachelor's degree and four-plus years designing custom layoutsAssociate's degree and six-plus years designing custom layoutsHigh school diploma and eight-plus years designing custom layoutsFour-plus years using layout design and verification toolsExperience in analog, mixed-signal, RF, or digital designApply advanced layout design, verification, analysis, and leadership skills to complex Qualcomm projects and technical issues.
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