Ip Design Pey Intern

Job Details
Job Description: About Altera At Altera™, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.About the Role
Join Altera IP solutions team and work on cutting edge FPGA RTL and IP design! Altera's IP Solutions Engineering (IPSE) team develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Altera’s FPGA devices. These solutions are provided as highly configurable intellectual property (IP) cores that are fully integrated with Altera's software CAD tool, Quartus Prime. The External Memory Interfaces (EMIF) and IO team is responsible for developing IPs for communication with state‑of‑the‑art DDR and LPDDR devices, MIPI cameras and sensors, and other high‑speed I/O applications. The ever‑growing demand for faster I/O interfaces - especially in the data centre and machine learning sectors - presents a challenging design problem that requires system‑level knowledge of silicon, software, IP, and customer applications. You will work with a team of engineers to develop and verify state‑of‑the‑art IP cores for interfacing with external memories and other I/O devices. You will be working on advanced FPGA architectures, design definition, implementation, and verification. Additionally, you will also be developing design examples and simulation models, accompanied by a rich set of technical documentation. In this role, you will work closely with multiple teams, including silicon design and validation, post‑silicon validation, application engineering, and customer experience teams, to ensure seamless development, integration, and optimization of high‑speed interface IP solutions.Specific Responsibilities
Architecture and Design based on the latest protocol specifications for DDR, LPDDR, and MIPI devicesRTL developmentDevice support and CAD tool integrationVerification (e.G. verification IP, methodologies, frameworks, bus functional models, regression tests)Hardware power‑on and debugNew product release and rollout supportCustomer technical supportBehavioral Traits
Strong skills in communication, initiative, innovation, and teamworkHighly motivated to learn and adapt to fast‑changing technologies and environmentsExcellent problem‑solving skills and attention to detailDemonstrate fundamental values such as accountability, integrity, and a winning mindsetCollaborative mindset, strong influencing skills, and a willingness to work across geographical locationsSalary
Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job‑specific knowledge. In addition to base salary, we offer performance‑based incentive opportunities that reward both individual contributions and overall company success. Estimated Salary Range: $90,000 - $100,000 CAD We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role. Applicants must be eligible for any required Canada export authorizations.Qualifications
Minimum Qualifications:Currently pursuing a BS degree in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science or related field3+ months of experience in Digital logic hardware (e.G. SystemVerilog, Verilog and/or VHDL) design or verification3+ months of experience in scripting languages and/or software programming (e.G. Python/TCL/Perl and/or C/C++)Preferred Qualifications:FPGA design experienceExperience with RTL simulation, timing closure and static timing analysisExperience with DDR, LPDDR, or MIPI hardware interfacesJob Type & Location
Job Type: Student / Intern (Fixed Term) Shift: Shift 1 (Canada) Primary Location: Toronto, Ontario, Canada Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.About Altera (Again)
Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy‑to‑use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end‑to‑end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.
#J-18808-Ljbffr