Principal Physical Design Engineer - SerDes - 16976

Category Engineering Hire Type Employee Job ID 16976 Base Salary Range $157000-$236000 Remote Eligible No Date Posted 04.16.2026

Note: This role is open to candidates based in the Greater Toronto Area—including Mississauga and Markham—as well as in Ottawa, including Kanata and Nepean. 

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced engineering leader with a passion for driving the physical implementation of advanced high-speed interface IPs and test-chips. With over a decade in digital or physical design, you’ve made significant contributions to project tape-outs and thrive in collaborative, cross-functional environments. Your expertise spans the entire design cycle—from RTL to GDSII—allowing you to tackle complex challenges with confidence and precision. You have a deep understanding of cutting-edge process technologies, including advanced FinFET nodes and low-power design techniques, and you’re adept at navigating the nuances of digital and mixed-signal architectures.

You are methodical and detail-oriented, leveraging strong software and scripting skills to automate and optimize design flows. Your leadership experience equips you to guide and mentor a small team of engineers, fostering innovation and excellence in every project. Communication is your strength—you can translate technical concepts across different levels of abstraction, whether collaborating with peer groups or engaging with customers. You’re comfortable making timely decisions, even in fast-paced and interrupt-driven settings, and you’re motivated by the opportunity to deliver results that exceed power, area, and timing targets.

Your commitment to continuous learning and improvement ensures you stay at the forefront of industry developments, and your ability to travel internationally as needed means you’re ready to support Synopsys’ global impact. Above all, you’re driven by the challenge and excitement of building the next generation of high-speed SERDES platforms and shaping the future of silicon innovation.

What You’ll Be Doing:

• Leading the physical implementation of high-speed interface IPs and test-chips, taking designs from RTL to GDSII.
• Driving timing and physical sign-off processes to ensure optimal performance and reliability.
• Collaborating with front-end, analog, CAD, and product teams to solve complex mixed-signal integration challenges.
• Guiding a team of engineers through project execution, mentoring and developing talent within the group.
• Developing timing constraints and design architectures to meet stringent power and area targets.
• Implementing advanced FinFET node solutions, utilizing low-power design techniques for next-generation SERDES platforms.
• Automating design flows and methodologies using scripting languages such as Perl, Tcl, and Python.
• Managing project milestones, ensuring on-time delivery of tape-outs and supporting international collaboration as required.

The Impact You Will Have:

• Accelerate the development of industry-leading SERDES IPs, setting new benchmarks in performance and efficiency.
• Drive innovation in mixed-signal integration, enabling reliable high-speed communication in advanced silicon.
• Enhance Synopsys’ reputation for technical excellence through successful project leadership and delivery.
• Shape future product architectures by collaborating across functional groups and sharing your expertise.
• Mentor and develop engineering talent, fostering a culture of continuous improvement and innovation.
• Contribute directly to the success of major customer projects, supporting Synopsys’ global reach and impact.
• Optimize power, area, and timing for high-speed designs, ensuring products meet or exceed market expectations.

What You’ll Need:

• 12+ years of digital or physical design experience with recent project tape-outs as a technical driver or project lead.
• Intimate knowledge of the full design cycle from RTL to GDSII, including chip-level implementation.
• Experience with advanced FinFET nodes (TSMC 16nm or below) and low-power design techniques.
• Strong software and scripting skills (Perl, Tcl, Python) with proven CAD automation knowledge.
• Solid engineering understanding of digital design, architecture, and mixed-signal verification flows.
• MSEE and 10+ years or BSEE and 12+ years of relevant experience.
• Previous project leadership experience and ability to travel internationally as required.

Who You Are:

• Collaborative and communicative, able to work effectively across diverse teams.
• Autonomous and decisive, comfortable managing multiple priorities and interruptions.
• Methodology-driven, with a passion for continuous improvement and innovation.
• Mentor and leader, fostering growth and development within your team.
• Analytical and detail-oriented, ensuring accuracy in complex design and implementation tasks.
• Adaptable and open to international collaboration and travel.

The Team You’ll Be A Part Of:

You’ll join the Mixed-Signal IP organization at Synopsys—a dynamic team focused on delivering high-performance, advanced SERDES platforms and test-chips across multiple process technologies. The team is composed of experts in digital, analog, front-end, and CAD domains, working collaboratively to solve the industry’s toughest challenges in high-speed interface design. Together, you’ll drive innovation, share knowledge, and build solutions that power the next generation of intelligent devices.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact View email address on careers.synopsys.com .