Mixed Signal RTL Design Engineer

Become a key player at Microchip Technology Inc. as a Mixed Signal RTL Design Engineer, focusing on high-performance analog and digital mixed-signal IP for wireline applications. Join the esteemed Mixed Signal Development Group, where your primary responsibility will be to contribute significantly to RTL design and verification of components like DDR and flash controller/PHY subsystems. Collaborating closely with architects and verification engineers, you’ll participate in the complete ASIC lifecycle, enhancing seamless connectivity for Microchip products. Your expertise will play a crucial role in pushing technological boundaries. Key Responsibilities:

• Participate in the full ASIC design cycle
• Design RTL using Verilog/SystemVerilog
• Run power simulations and lint checks
• Collaborate on verification plans and debug issues
• Assist with STA timing closure and analysis

Requirements:

• Bachelor’s, Master’s, or PhD in Electrical Engineering
• 2–10 years of ASIC development experience
• Strong RTL design using Verilog or SystemVerilog
• Experience with lab debugging equipment
• Knowledge in C/C++ and scripting languages

Support innovation and excellence in mixed-signal design at Microchip Technology Inc. #J-18808-Ljbffr