ASIC Digital Design, Staff Engineer - 9730

Synopsys Inc

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated and experienced digital design engineer with a passion for prototyping and developing HDL modules for SERDES products. With a strong background in ASIC/FPGA development and hardware validation, you excel in writing HDL code, running simulations, and debugging hardware issues. Your expertise extends to scripting in Python and MATLAB to automate model training and hardware verification processes. You thrive in a collaborative environment, working alongside a mixed-signal design team to verify and enhance next-generation Ethernet, PCIe, SATA, and USB SERDES products. Your organizational and communication skills enable you to interact seamlessly with different teams, ensuring project success from specification development to functional and performance testing.

What You’ll Be Doing:

  • Writing HDL modules in Verilog, simulating, and synthesizing the code
  • Optimizing FPGA designs according to hardware constraints
  • Executing hardware tests to verify the RTL
  • Debugging hardware issues
  • Scripting in Python/MATLAB for automating hardware verification processes
  • Tracking issues in Jira and documenting in Confluence

The Impact You Will Have:

  • Contribute to the development of high-performance SERDES products
  • Enhance the efficiency and reliability of hardware verification processes
  • Drive innovation in prototyping and HDL module development
  • Collaborate with a team of experts to deliver cutting-edge mixed-signal designs
  • Ensure the successful integration and functionality of SERDES products
  • Streamline communication and documentation across different teams

What You’ll Need:

  • 5+ years of hands-on experience in ASIC/FPGA development and hardware validation
  • Proficiency in writing HDL code and running simulations using TCL scripts
  • Strong understanding of the digital design process
  • Basic knowledge of Synthesis and Static Timing Analysis
  • Experience in developing testbenches in Verilog and System Verilog
  • Excellent programming skills in Python
  • Familiarity with scripting languages like Perl and working in a Linux environment
  • Basic knowledge of high-speed digital & mixed-signal design is an asset
  • Familiarity with JIRA and Confluence platforms
  • Basic understanding of various machine learning models is an asset 

Who You Are:

You are a detail-oriented engineer with excellent problem-solving skills. Your ability to communicate effectively and collaborate with cross-functional teams is key to your success. You are adaptable and eager to learn new technologies and methodologies. Your passion for continuous improvement and innovation drives you to excel in every project you undertake.

The Team You’ll Be A Part Of:

You will join a highly experienced mixed-signal design team dedicated to developing and verifying high-performance SERDES products. This team is responsible for delivering top-notch mixed-signal designs, from specification development to functional and performance testing. Collaboration and knowledge sharing are at the core of our team's success, providing you with an excellent opportunity to grow and contribute to groundbreaking innovations.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact View email address on careers.synopsys.com .

Vacancy posted more than 2 months ago
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